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Serial Technologies |
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| An increasing number of our customers are turning to high-speed serial technologies to avoid the almost impossible design constraints imposed by wide, high-speed synchronous buses. To support new standards such as PCI Express™, IC vendors Xilinx and Altera both now include multi-gigabit serialiser /deserialiser (SERDES) IOs on their FPGAs. | |
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The functionality of these multi-gigabit transceivers prevents us using typical IBIS models for simulation. Features used in SERDES IOs such as "pre-emphasis" are data dependant and therefore outside of the capabilities of the IBIS specification. Fortunately, Cadence have worked closely with Altera to develop accurate DML models for use within the Allegro PCB design flow. These verified models have been correlated to match both the actual silicon design and empirical data. This gives engineers the ability to design, simulate, and implement multi-gigabit data channels that are free from board-level signal quality issues. |
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| We have models and design-in kits for... | |
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Using Altera® Stratix™ GX HSSIO, Intel Grantsdale Chipset, Cadence Design Foundry IO Models |
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3.125Gbps to 6.25Gbps RocketIO™ Serial Transceivers |
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3.125Gbps to 6.25Gbps HSSIO Serial Transceivers |
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"Our customers' ability to quickly design-in the Virtex II Pro Rocket IO technology is critical. Working with Cadence, we are minimizing the design-in time for our customers, enabling them to take advantage of dramatic system cost savings through the implementation of the serial technology in their next design." Rich Sevcik - senior vice president and general manager of FPGA products at Xilinx. “By delivering the first fully behavioral SERDES model, Altera customers implementing Stratix GX devices are able to proactively address link simulation issues typical of 3.125-Gbps transceiver designs. In Allegro PCB SI, our behavioral DML model performs at least 20 times faster than traditional transistor-level models without sacrificing accuracy.” Vipul Badoni - senior manager, high-speed I/O applications engineering at Altera. More
information on FPGA MGHz link simulation, click
here |
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To learn more about signal integrity, email chris.halford@alspcb.com |
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| Advanced Layout Solutions Ltd offers the complete PCB design solution. | |
| +44 (0) 118 971 1930 | |
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