| Advanced
Layout Solutions Ltd (ALS) UK's No.1 Cadence Allegro PCB Design
Bureau!
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| Allegro SI
Formally known as SpecctraQuest, Allegro
SI is Cadence Design Systems' high-speed signal integrity platform. It is
the tool used for the majority of Advanced Layout Solutions' signal integrity work.
For more information see...
http://www.allegrosi.com
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| ANSI
American National Standards Institute
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| Bismaleimide
Triazine
Bismaleimide Triazine, or BT, is an epoxy system used as the dielectric
in increased-performance PCBs and substrates. The material has a low loss tangent
and Er which makes it
advantages when used in high frequency, low-loss designs.
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| Blind
Via
Via that connects one outer layer to one or more
inner layers. The hole does not go right the way through the PCB.
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| BT
See Bismaleimide
Triazine
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| Buffer
Delay
Buffer delay is the time it takes the voltage of
a driver to reach a predefined measurement voltage, Vmeas, when driving a
standard test load. Buffer delay is subtracted from the absolute time for
a receiver waveform to reach a logic threshold. The difference between
these two measurements represents the portion of the delay attributable to
interconnect effects. Buffer delay is measured for both rising and falling
edges.
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| Buried
Via
Via that connects only inner layers together and
does not connect to the outer layers of the stack. See Blind
Via.
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| Bypass
Capacitor
Bypass capacitors allow signal return currents to flow freely between the power supply planes. Return currents will tend to flow through the path of least
inductance. This means that they will follow the signal path as
closely as possible through the reference planes. When the signal passes
through a via to a different signal layer it may reference a different
power plane. When this happens the return current will find it's way
though the board through vias and capacitors and, again, travel close to
the signal path within the new plane. As these currents flow through these
more inductive paths they develop small voltages between the power planes,
seen as power supply noise. To reduce this noise it is necessary to add
bypass capacitors across the board to allow return currents to flow freely
though these low inductance paths between power planes.
Depending on the polarity
of the digital signal the return currents may wish to flow into either
power pins or ground pins of the signaling device. For this reason it is
important to add bypass capacitors in close proximity to ICs power pins.
In PCB layout terms, to
achieve this low inductance path through capacitors requires the following; short fat traces,
no vias (or as few as possible) and low package inductance which comes from
physical dimensions (1206 ~1.2nH; 0805 ~1nH; 0402 ~0.8nH).
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| Capacitance
Capacitance is a measure of the ability of a
structure to store charge per unit of voltage applied. Capacitance (C) is
a constant that only depends upon the structure of the capacitor and does
not change when a different voltage is applied across the capacitor.
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| Capacitor
Package Inductance
Package inductance comes from the physical dimensions (1206 ~1.2nH; 0805 ~1nH; 0402 ~0.8nH).
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| Characteristic
Impedance
In a transmission line, Zo
(the input impedance) is the ratio of inductance to capacitance per unit
length. With respect to a PCB design these figures come directly from the physical
geometry of the signal conductor and the reference plane. Impedances
easily achievable on a PCB range from about 45 Ohms to 80 Ohms.
Impedance increases as
traces reduce in width and as distance from plane in increased. When a PCB
requires both high and low impedance traces careful attention must be paid
to the board stack-up. Higher impedances can be achieved on the outer
signal layers as there is only one reference plane, making the trace more
inductive and less capacitive.
Zo = Sqrt(L/C)
E.g. Sqrt(8nH/2pF) =
63Ohms
When our signals are electrically short (traces
length is short compared to edge length) we do not need to worry about
characteristic impedance as there is little gain from tightly controlling
this parameter.
Advanced Layout Solutions use the field solver in
Allegro PCB SI to calculate trace impedance. Click
here to see how the results compare to other tools.
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| Common Mode Impedance
This is the impedance seen when measuring a pair of
lines that are driven by identical (common) signals. Z common mode is half Zeven.
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| Conductor
Material that allows the passage of electricity
though it's medium.
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| Crosstalk
Changing currents in signal conductors generate
magnetic fields. When other conductors come in close proximity, these
fields induce voltages within them. This unwanted coupling between signals
is is referred to as crosstalk.
As we reduce gap sizes and cram more trace onto
printed circuit boards inductive coupling increases. Crosstalk can be
controlled in the “traditional” constraints by using the “max
parallel rule” to prevent traces running side by side in close proximity
over long distances. In practice we are normally trying to design a board
on as few layers as possible and are trying to route the design as densely
as possible. To prevent parallel routing without even knowing if there is
a potential problem is a very harsh constraint. As well as trace spacing,
crosstalk magnitudes are proportional to signal edge rate. Therefore, to
do a proper job we need to be simulating with active I/Os, not just
looking at trace geometries.
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| Crowding
See Current Crowding
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| Current
Crowding
Current flow within a conductor is not always a
uniform distribution. Phenomena such as skin effect
and proximity effect cause current density to vary
within the conductor.
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| DCD
Duty cycle distortion.
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| Decoupling
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| Decoupling
Capacitor
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| Deterministic
Jitter
These forms of jitter are predictable and come from
specific causes, including ISI and crosstalk
noise. In terms of PCB design, deterministic jitter can be reduced by
controlling crosstalk through good design practice and board-level
simulation.
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| Dielectric
A material that acts as an electrical insulator. In
the context of printed circuit boards, the dielectrics are the insulating
materials between the conductor layers. They are either 'cores' (cured
materials supplied in a pre-made laminate) or 'pre-pregs' (pre-impregnated
semi-cured materials used to separate a stack of core laminates).
There are key properties associated with dielectrics
that have major impacts upon signal integrity. These are, Dielectric
constant (Er) and Loss Tangent.
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| Dielectric
Constant
Also called permitivity. The dielectric constant (Er) of a
dielectric is the ratio of capacitance of a
capacitor using the dielectric to the capacitance of an identical
capacitor using a vacuum as a dielectric. In PCB terms, the higher the
figure the slower the propagation velocity of a signal traveling within
this medium. Air has an Er of approximately 1.0 and FR4 typically between
4.2 and 4.5. This is why signals travel faster on the outer layers of a
PCB than on internal layers, where the traces are surrounded with
dielectric.
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| Dielectric
Loss Factor
If you place a piece of FR-4 dielectric in a
microwave and cook it for one minute it will become warm. This is because
the changing electric field of the microwaves heats up the material. How
much heat is absorbed depends on the dielectric loss factor for that
material. The same applies for a signal on a printed circuit board, some
of the signal's energy will be absorbed by the dielectric and converted to
heat. Under 1GHz dielectric losses can usually be ignored in digital
systems, but the effect is always modeled in simulations at Advanced
Layout Solutions.
See: Loss Tangent
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| Differential
Impedance This is the impedance seen when a pair of conductors are driven
with equal and opposite polarity signals. Z differential is twice the odd
mode impedance, Zodd.
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| Dissipation
Factor
See Loss
Tangent
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| Distributed
System
The notion of lumped and distributed systems comes
from the ratio of rising edge length to physical system size. A conductor
in a distributed system is one in which, at a given time, the signal
voltage varies significantly across it's length. In a lumped system
the voltage will be fairly uniform across it's length.
Persuade a friend to hold onto the end of a 20m
hosepipe. Grab hold of the other end and when he least expects it,
violently whip the hosepipe into the air and back down again. You will see
a pulse propagating down the pipe, towards your friend. This is a good
analogy for a distributed system on a PCB as the hosepipe is at a
different voltage (height off the ground) along it's length. The signal
propagates down the line, incurring a propagation
delay and eventually whips your friend's arm (the receiving input)
into the air. If the pulse dies away before reaching the end then your
system is too lossy. Maybe you are trying the experiment in dense, long
grass? This dense medium would cause loss in an analogous manner to the way
in which
electrical signals loose energy to the dielectric.
If your friend is particularly strong and holds his end completely still
you may even see some of the pulse reflecting back towards you after it
has reached the end. In this case the pipe may be incorrectly
terminated. The analogies could continue...
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| Edge
Length
This is the length of a signal transition and is a
function of edge rate and propagation velocity. For a propagation velocity
of 7.1 inches/nanosecond, the following edge lengths are applicable:
10ns edge = 71 inches, 1ns edge = 7.1 inches, 400ps
edge = 2.9 inches. A system is typically considered 'distributed'
if the trace length is bigger than 1/6th of this distance, i.e. 11.8
inches, 1.2 inches and 0.48 inches.
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| Effective
Series Resistance (ESR)
Effective Series Resistance is the resistive
component of a capacitor's equivalent circuit.
A capacitor can be modeled as an ideal capacitor in
series with a resistor and an inductor. ESR is the resistive element in
this model.
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| Electromagnetic
Compliance
An electronic product must
conform to emissions standards laid down by governments around the world.
Such regulatory standards include CE (Europe) and FCC (United States).
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| Electromagnetic
Interference
Current loops on PCBs will
radiate magnetic fields very effectively. The amount they radiate is
proportional to the area of this current loop and signal edge rate. With
the high signal edge rates used by today's drivers, current loops must be
kept very small. To achieve this the signal trace should be a transmission
line, closely coupled to a reference plane. A signal trace will typically
be only 5thou (127um) above it's reference plane. This inevitably provides
a very small current loop. However, when a signal trace strays from the
return path due to slotted plane or layer change then the loop area can
increase dramatically and radiate. To minimise this, ensure signals
have a low inductance path for return current flow.
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| EMC
See Electromagnetic
Compliance
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| EMI
See Electromagnetic
Interference
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| Equivalent
Series Resistance
See Effective
Series Resistance
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| ESR
See Effective
Series Resistance
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| Even Mode
Impedance
This is the impedance seen
on one side of a pair of lines when the other side is driven by an equal
and same polarity signal. Zeven is twice Zcom.
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| Eye Diagram An
eye diagram allows all bits (symbols) in a serial data stream to be
overlaid upon one another. This yields a graph one bit period wide of all
data bits superimposed, and looks like a human eye. As ISI
noise increases the eye appears to close, as timing and level margins
reduce.
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| Fall
Time
This is the time taken for
a digital signal to fall from a logic high to a logic low. It is usually
quoted as the time taken to fall from 90% of maximum voltage to 10% of
maximum voltage.
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| First
Switch Delay
In timing analysis, this is the time between the
output driver reaching Vmeas and the input receiver reaching Vih/l. This
is the same as time to Vih/l - buffer delay.
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| Fourier
Series (FS)
A method that defines a periodic function as a
series of sine and cosine waves, and can be used to predict the level of
system response. First presented in 1807 by Fourier as a tool for
representing any periodic function.
See: Discrete Fourier Transform.
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| Discrete Fourier
Transform (DFT)
Mathematical operation which transforms from the
time domain to the frequency domain and vice versa. It is able to
transform both periodic and non-periodic signals. In the discrete
transform the signal representations comprise N discrete samples, making
the DFT spectrum periodic with frequency even when the original analogue
signal was non-periodic.
See: Fast Fourier Transform.
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| Fast Fourier
Transform (FFT)
Fast Fourier Transforms are computer algorithms
that greatly speed up the Fourier Transform operation.
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| FR-4
FR-4 is the fibre-glass base material from which
plated-through-hole and multilayer printed circuit boards are constructed.
"FR" stands for Flame Retardant, and type "4" indicates
woven glass reinforced epoxy resin.
FR-4 is a reasonable, cost effective material with a
dielectric constant in the range
3.8-4.6, depending on the glass-resin ratio. It decreases with increasing
resin content and increasing signal frequency. At microwave frequencies,
dielectric losses make FR-4 unsuitable and materials such as PTFE
are more appropriate.
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| Ground
Bounce
Ground bounce is an undesirable phenomena whereby a
potential difference develops between the ground plane reference and the
ground supply inside an IC package. The voltage difference is mostly
caused by the inductance of the package interconnect (pins, package traces
and wirebonds). High frequency currents cause voltages to develop across
these connections, pushing the IC ground to a higher voltage.
The effect can be reduced by adding more ground
connections and improving the connection between PCB and IC (die). Moving
from wire bond to flip-chip gives a huge improvement. Note: no amount of
capacitors or filters will help here, the voltage is developed across the
connection between IC pin and die. The effect can be measured by driving a
spare IO pin low and then observing the voltage at this pin when the IC is
static and operational.
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| GETEK
This is a resin used in the production of higher
performance FR-4 laminates. It is manufactured by General Electric
Plastics and is used in higher frequency designs where the low loss
tangent (around 0.012) is desirable. Er stability is vastly improved
over standard FR-4 (3.5 to 4.3 at 1MHz) and is virtually constant between
1MHz and 2GHz. Z-axis expansion is much less than standard FR-4 and it has
a Tg of 180 degrees C.
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| Henry Unit
of inductance (L).
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| IBIS
Io Buffer Information Specification. This
is the most widely adopted model format in the industry. These behavioral
models are commonly available from IC vendor's websites. The tools used at
Advanced Layout Solutions accept all IBIS versions up to and including
IBISver4.0.
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| ISI Inter
Symbol Interference (ISI) is distortion of a signal due to the data
pattern that proceeded it. When ISI is significant a logical '01' will
look very different if the proceeding data was '0000' or '1111'. The best
way to measure ISI is to use an eye diagram.
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| Jitter
Jitter in a signal describes it's deviation from the
ideal timing of an event. Jitter is composed of both random jitter and deterministic
jitter.
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| Knee
Frequency
The "knee"
frequency is the frequency below which most of the energy in a digital
signal is contained. If a PCB interconnect can pass all frequencies up to
the knee frequency then the signal will be faithfully reproduced. This
frequency is related purely to the rise time (and fall time) of a signal.
E.g. Rise time (Tr) = 1ns
10% - 90%
Fknee = 0.5/Tr
= 500MHz
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| Loss
In a real-world system,
signal energy will be lost as it propagates across a PCB. This energy will
be lost to the conductors themselves and to the dielectrics surrounding
them. The mechanisms for these losses are Trace Resistance, Skin
Effect, Current Crowding and Dielectric Loss. The
significance of this in the PCB design context is that signals traveling
through traces (especially long traces and / or at high frequencies) will
suffer from degradation. The level of degradation will determine factors
such as maximum trace length, maximum operating frequency and minimum
trace width.
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| Loss
Tangent
Also referred to as Dissipation Factor and Tan
Delta. The ratio of the power loss in a dielectric material to the total
power transmitted through the dielectric, the imperfection of the
dielectric. Equal to the tangent of the loss angle. This figure is ideally
as low as possible as it reduces heat loss in the dielectric. FR-4 is
typically around 0.035 and BT around 0.01.
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| Lumped
System
A system where all points in the system react
together with uniform voltage. A lumped system will have a very long edge
length compared to it's physical size. See: Distributed
System.
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| Microstrip
This type of PCB trace is routed on an external
layer and references just one plane. For this reason it will have a higher
impedance than a similar geometry routed on an inner layer, known as a stripline.
Advantages: Can route surface mount components
without vias.
Disadvantages: Crosstalk effects are increased,
signal coupling is more significant and surrounding signals affect victim
trace impedance significantly. EM emissions are also increased.
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| Microvia
A microvia uses a very small, LASER drilled, hole
which makes them ideal for 'via-in-pad' applications. The via connects
only selected layers of the PCB stack. The drill hole does not pass right
the way through the stack and therefore tracks can be routed under or over
the via.
See: Blind Via, Buried
Via.
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| Nanosecond
= 0.000001 seconds, 0.001 milliseconds,
1000picoseconds
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| Odd Mode
Impedance This is
the impedance seen on one side of a pair of lines when the other side is
driven by an equal and opposite polarity signal. Zodd is half Zdiff.
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| Overshoot
An overshoot occurs when, due to bad judgment, often
in strong winds, you run out of useful airfield and land "off".
That's what I was told anyway. The principle holds though, things that
move with greater momentum take more stopping. A signal with a very fast edge rate will
tend to overshoot it's steady state voltage levels. Reduction in overshoot
can be achieved with series resistors, slowing down the edge rate.
Overshoot is the amount by which a signal exceeds the steady state
condition, i.e either rising too far or falling too far. Undershoot is the
amount by which a signal travels below it's steady state voltage during
it's settling time.
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| Picosecond
= 0.000000001 seconds, 0.000001 milliseconds, 0.001
nanoseconds
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| Planes
(Power)
Solid layers of copper in the PCB stack-up to
provide very low impedance distribution of the supply voltages. Used as
reference planes for routed transmission lines, the characteristic
impedance of these lines is based upon the L and C of line/plane.
A very effective technique for reducing supply noise is to stack
power and ground planes together as this forms an
"inductance-free" capacitor. To maximise the effect use the
thinnest pre-preg possible between the planes. Special pre-preg materials
exist to maximise this capacitance. The downside to this technique is that
it forces routing layers to be stacked together, assuming a plane/signal
ratio of 1/1.
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| Propagation
Delay
This delay is the time taken for a signal to
propagate across unit length of transmission line (usually ps/inch).
Typical values for a PCB are 140ps/inch for a
microstrip and 180ps/inch for a stripline.
Propagation delay is a function of dielectric
constant (Er), The higher the constant the higher the delay (slower the
velocity of the signal). The fastest possible propagation is with a
dielectric constant of 1 (air) which yields ~85ps/inch.
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| Proximity
Effect
When opposing high
frequency currents flow in adjacent conductors the current density will
increase within the inside surfaces of the two conductors. This is a
similar mechanism to the Skin Effect, the current density will
redistribute to flow through the path of least inductance.
This is the same effect
that is seen in the flow of currents in a transmission line and reference plane. The
high frequency currents will flow mostly, if possible, in surfaces of the
conductors that face each other.
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| PTFE PTFE (PolyTetraFluoroEthylene)
is a polymer used in high performance PCB manufacture. Typical materials
are ceramic filled PTFE/ woven glass (Er
around 3.5), and a PTFE/ woven glass (Er
around 2.2)
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| Return
Currents
Current always flows in loops. The current flow from
one IC to another, through the traces are the signal currents. The current
that flow back though the power supply planes are the return currents.
When we design traces routed across a PCB we must consider the path these
return currents will take.
See: Bypass Capacitor.
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| Ringing
When traces are short compared to the edge length of
a signal then the inductance and capacitance of the trace and the load can
cause the high frequency oscillations to occur on transitions. This effect
is called ringing. Ringing can be considered as reflection on a short
line.
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| Rise
Time
This is the time taken for
a digital signal to rise from a logic low to a logic high. It is usually
quoted as the time taken to rise from 10% of maximum voltage to 90% of
maximum voltage.
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| Series
Termination When a signal is series
terminated a resistor is placed in series with the signal at the source.
If the resistor value = Zo-Rs then a voltage divider is set up between the
transmission line and the driving structure (Rs+Rt), producing an initial
line voltage will be approximately VCC/2. When the signal reflects off the
single load it will see a signal of full amplitude as the signal and
reflection are coincident. When the reflection arrives back at the source
it will see a termination resistance of Zo (Rs+Rt) and therefore dies away
without further reflection. Series termination has the advantage of low
power consumption and reduces power transients / EMI. It works well with
single loads or all loads at destination.
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| Settle
Time
In timing analysis, this is the time between the
output driver reaching Vmeas and the input receiver reaching Vih/l for the
final time. This is the same as time to Vih/l (final crossing) - buffer
delay.
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| Skin
Depth
At high frequencies current will tend to flow
just within the surface of PCB traces due to the skin
effect. The depth of this current penetration is referred to as the
skin depth.
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| Skin
Effect
A direct current exhibits
even dispersion of electrons through a trace's cross section. As signal
frequency increases the electrons tend towards the outer edge of the
profile (the "skin"). At high frequency most of the current flows just within the
outer surface of the trace, a dimension referred to as the skin
depth. This 'box-section' of trace
is the path
of least inductance. The effect of this phenomena is an increase in linear
resistance as frequency increases. To reduce this effect on a PCB, increase
the trace
width.
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| SpecctraQuest
SI
See Allegro SI
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| Stripline
This type of PCB trace is routed on an internal
layer and references two planes. For this reason it will have a lower
impedance than a similar geometry routed on an outer layer, known as a microstrip.
Advantages: Reduced crosstalk effects, increased
impedance stability, reduced emissions.
Disadvantages: Requires vias to connect to them.
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| Termination
When a signal traveling in transmission line meets
an impedance discontinuity (such as a via), part of the signal energy will
be reflected back down the line. This reflected signal may interfere with
the forward signal transitions. The biggest impedance discontinuity is
usually the load (pad, pin/ball, package and die) which will usually be a
high impedance. To control reflections the line should be 'terminated'
with the characteristic impedance of the transmission line. The usual way
to do this is by adding termination resistors of various topologies to the
net. There are numerous topologies for termination which are chosen based
upon factors including response time, power consumption and PCB real
estate.
The Cadence toolset allows extensive exploration of
termination strategy and is an area of pre-route simulation that ALS
offer as a service to it's customers.
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| Trace
Resistance
Pure resistance in a
conducting trace, measured in Ohms/inch. A 5mil trace of 1oz copper has a
value somewhere around 100mOhm/inch.
This is the real part of
the impedance of a transmission line. For DC signals, this is the
characteristic impedance of the trace. This resistance causes loss
in the trace and starts to rise at high frequencies due to the skin
effect.
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| Transmission
Line
A signal-carrying circuit with controlled
electrical characteristics used to transmit high frequency signals. We
think of our trace as a transmission line when the edge length of our signal is short compared
to the conductor (distributed system). A transmission line is implemented
on a PCB by using a fixed conductor and plane geometry, giving a constant
ratio of L and C per unit length (see Characteristic
Impedance). Signal attenuation is a function of the length of the line
and the frequency of the signal.
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| Undershoot
See: Overshoot.
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| Via
Copper connection through PCB stack in the Z axis.
Connects one or more layers together.
See: Blind Via, Buried Via,
Z Axis Delay, Via Inductance.
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| Via
Inductance
The inductance of through-hole vias is of paramount
importance to signal integrity. This series inductance will cause signal
distortion as the signal passes this impedance discontinuity. Of more
concern is the use of through-hole vias with small decoupling capacitors
as the inductance of the vias can negate much of the benefit of the
capacitor.
Typical values: 10mil via, 1.6mm PCB ~1.3nH
If a capacitor is connected with a single via at
each end then this inductance equates to a reactance to an 800ps edge
of...
PI*2.6nH/800ps = 10.2 Ohms
See: Decoupling Capacitor.
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| W-Element
The W Element SPICE format allows accurate modeling
of multi-conductor, lossy frequency-dependent transmission lines. It
provides: Exact analytical solution for AC and DC analysis, no limit on
the number of coupled conductors, no restrictions on the structure of RLGC
matrices; all matrices can be full, no spurious ringing as that produced
by the old U Element, accurate modeling of frequency-dependent loss in the
transient analysis.
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| Z
Axis Delay This
is the delay in the Z axis as a signal propagates through a via. Z axis
delay is taken into account in the Allegro tools and offers more accurate
delay matching between signals.
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| Zchar
See Characteristic
Impedance
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| Zcom, Zcm,
Zcommon See Common
Mode Impedance
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| Zdiff See
Differential Impedance
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| Zeven, Zoe See
Even Mode Impedance
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| Zo
Ideal transmission line
impedance (zero resitance). See Characteristic Impedance
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| Zodd, Zoo See
Odd Mode Impedance
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