PCB Design Flows

At ALS, we recognise that there are fundamental differences between PCB products. We understand that your new light-switch design probably does not require signal integrity analysis... but also that your new 2400MHz DDR4 memory interface or 8GBps PCI Express link almost certainly will!

To ensure that your design is approached in the best possible way, we offer a choice of three different design flows.



  Standard Constraints Flow - This flow is the standard route to PCB layout. The designer, usually working alone, will apply all the necessary high-speed physical constraints (matched lengths/delays, differential-pair rules, bus scheduling, characteristic impedance, etc). This is the most common design-flow and is suitable for layouts in which signal integrity concerns are low enough to be controlled through good design practice.  






  Signal Integrity Flow - This flow is becoming increasingly common as IC vendors continue to reduce the switching times of their IOs. In the signal integrity (SI) flow we use pre and post-route simulation to ensure the optimum PCB layout. The designer and SI engineer work simultaneously on the design, usually resulting in the same turnaround time as the standard constraints flow. This flow is suited to high edge-rate designs, especially those that involve DDR memory interfaces, high-speed clock distribution and multi-drop busses. 



  MGHz Flow - The uptake in multi-gigabit serial technology has given rise to a different approach to SI analysis.  Using the MGHz flow serial channels can be simulated using "channel analysis" to predict problems seen on very long data sequences that would not be evident from analysing simple signal transitions. In this flow, additional stages are involved in the design and frequency-dependent "S-Parameter" modelling is used in the analysis. This flow is particularly well suited to systems using MGbit channels such as XAUI, 10GbE, RocketIO, PCI Express etc.













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